EE 603 Power Electronics

 

Homework # 5          Due February 22, 2006

 

Lectures 8 and 10 on the web at www.engr.uky.edu/~radun.

 

Problem 1

 

In the circuit above Vin = 160V, R = 49 W, C=.1 uF, and L = 2.8 mH. Let  where the sinusoidal frequency ws = 2pFs << 2pFsw the switching frequency.

 

a)     Plot the transfer function of the circuit and determine the maximum system frequency Fs at which  is a good approximation.

b)     With a 1.0 kHz system frequency plot the output using .

c)      How many switching cycles are there in one cycle of Dn if the switching frequency is 100kHz?

d)     Use the nonlinear discrete time model of this circuit to compute the steady state output with a switching frequency of 100kHz (use MATHCAD, MATLAB, or your computer language of choice) and with a 1kHz system frequency. Repeat with a 5kHz switching frequency and a 1kHz system frequency.

e)     Repeat d) with the average model. Note that the average model is the same for any switching frequency. You may use Spice with the average model.

 

Problem 2

 

 

Use the average model of the circuit in problem 1 with Vin = 160V, R = 25 W, esr = 0.5W, C=10 uF, and L = 1.4 mH to design a closed loop system with proportional-derivative-integral control. The switching frequency is 100kHz. You are to regulate the DC output voltage to 70V.

 

a)     What is the DC inductor current and what is the DC voltage across the esr?

b)     Estimate the peak to peak inductor ripple current.

c)      Estimate the output ripple voltage. Which contributes more to the output ripple voltage, the esr or the capacitor?

d)     What is the average model transfer function in terms of s from the input duty cycle to the output voltage?

e)     What is the characteristic polynomial of the closed loop transfer function?

f)       The capacitor’s esr has the same effect on stability as which feedback gain? This turns out to be of practical importance since capacitor esr tends to make a closed loop system more stable. Thus a system that is stable with one capacitor might not be stable with another capacitor with lower esr.

g)     Choose the gains kp, ki, and kd so the closed loop poles are approximately equal to s1 = 2,000s-1, s2 = (5,000 + j 5,000) s-1, s3 = (5,000 - j 5,000) s-1.

 

Problem 3

 

A high gain differential amplifier (A = 100) is connected as shown in Fig. 1.

 

Figure 1         Circuit with a high gain amplifier.

 

a)    What is the maximum output voltage?

b)    What is the minimum output voltage?

c)     Write an equation for the output voltage in terms of V+ and V-.

d)    Plot Vout as a function of time for two cycles when Vref = -10VDC, -5VDC, 0VDC, 5VDC, and 10VDC.

e)    From your plots, what mathematical function does this circuit perform? Can you write an equation for it? What is the duty cycle of the output waveform in terms of Vref?