EE 380-001
Computer Organization and Design I
Course Syllabus
Fall, 1998

Instructor: Dr. J. Robert Heath
Office: 310 Electrical Engineering Annex (257-3124)
Email: heath@engr.uky.edu
Web Page: http://www.engr.uky.edu/~heath
Office Hours: M (11:00 am - 12:00 noon)
W (1:00 -2:00 pm)
F (2:00 - 3:00pm)
Text: D.A. Patterson, J.L. Hennessy, Computer Organization and Deign: The Hardware/Software Interface, Second Edition, Morgan Kaufmann, San Mateo, CA, 1998.
References: W. Stallings, Computer Organization and Architecture: Designing for Performance, 4th. Ed., Prentice -Hall, Inc. 1996.

R.E. Haskall, Introduction to Computer Engineering: Logic Design and the 8086 Microprocessor, Prentice- Hall, Englewood Cliffs, NJ, 1993.

G.H. Miller,Microcomputer Engineering, Prentice Hall, Englewood Cliffs, NJ, 1993.

J.S. Byrd, R.O. Pettus, Microcomputer Systems, Architecture and Programming, Prentice Hall, Englewood Cliffs, NJ, 1993.

S.G. Shiva, Computer Design and Architecture, 2nd. ed. Harper Collins Publishers Inc. 1991

Meeting Schedule: MWF (8:00-8:50am) AH 257
Class Web Page URL: http://www.engr.uky.edu/~heath/ee380.htm
Course Description: Hardware and software organization and design of a typical computer; computer performance; instruction set design, machine language and assembler language programming, computer arithmetic; datapath and controller design; pipelining, memory structures, interfacing peripheral devices, and input-output structures; real-time computer applications, laboratory included. Prereq:EE280orCS245. (Same as CS380)
   
   

 

Topical Outline:

  1. History of Computers and Digital Logic
  2. Computer Abstractions and Technology
  3. The Role of Performance
  4. Instructions, Language of the Machine
  5. Arithmetic for Computers
  6. The Processor: Datapath and Control
  7. Enhancing Performance with Pipelining
  8. Memory Hierarchies
  9. Interfacing Processors and Peripherals

 

Instructional Objectives:

In taking this course you will learn and /or be able to do the following:

1. The History of Computers and Digital Logic.
2. Computer Abstractions and Technology
 
3. How Integrated Circuits Have Influenced Computer Organization, Design, and Performance
4. The Role and Importance of Computer Performance
5. Different Types of Computer Instructions: The Language of a Computer
6. How Computers Perform Arithmetic
7. Design Central Processing Unit (CPU) Consisting of a Datapath and Control Unit
8. The Principle of Pipelining and How it Enhances Performance
9. The Levels and Function of a Computer Memory Hierarchy
10. The Interfacing of Processors and Peripherals (Time Permitting)
11. How to Work in a Unix Computing Environment

Outcomes:

Students should demonstrate an:

1. Understanding of the levels of software and hardware comprising the Instruction Set Architecture of a computer.
2. Ability to analytically and experimentally analyze, evaluate, and compare the performance of computers.
3. Ability to design the assembly language instruction set of a high performance computer for a particular application environment of the computer.
4. Understanding of how computers perform both fixed and floating point(IEEE 754 format) addition, subtraction, multiplication, and division.
5. Ability to organize, design, and implement at the gate and register level the five functional units(datapath, controller, memory, input, and output) of a computer.
6. Ability to make design decisions based on performance data.
7. Ability to write and run assembly language programs on a simulator of a designed computer.

 

Grade: 1. Three Tests (15%Each: Sept.25, Oct.21, Dec.2 ) 45%
  2. Homework (Assigned Daily, All Assignments Will Not be Graded) 5%
  3. Laboratory Assignments (Approximately Five) 15%
  4. Comprehensive Final Examination (As Scheduled by University) 35%

Tests and Final Exam are graded on 100 point basis. Homework and laboratory assignments are graded on a 5/15 point basis respectively. Your final grade will generally be determined by the number of points you have accumulated from 100 possible points as follows:

A: 90 - 100 pts.

B: 80 - 89 pts.

C: 70 - 79 pts.

D: 60 - 69 pts

E: 59 or below

*An equitable grade scale will be applied when warranted.

Make - Up Examinations:

Make-up examinations will only be given to students who miss examinations as a result of excused absences according to applicable university policy. Make-up examinations may be oral examinations.

 

Cheating:

Cheating will not be allowed or tolerated. Anyone caught cheating will be dealt with according to applicable University policy. (Assignment of a grade of E for the course).

 

Class Attendance:

Attendance of all class lectures is required to assure maximum course performance. You are responsible for all business conducted within a class.

 

Homework, Laboratory Assignments:

Homework and laboratory assignments will be periodically made. Assignments are due at the beginning of the class period on due dates. Late assignments cannot be accepted.