Capturing the circuit schematic is done in Design Architect. If the schematic is needed in higher schematic, it needs to be represented by a symbol. This is done using Design Architect.

Then, design viewpoint is created to generate the files needed for simulation with Quicksim, Accusim or for Layout.

Quicksim in Mentor Graphics does digital simulation.

Accusim in Mentor Graphics does analog simulation.

Layout is done IC Station. Verification to confirm that the layout conforms to the process rules and schematic is done using DRC check and LVS. Extraction of the resulting capacitance is done using ICextract. All these features (DRC check, LVS, ICextract) are in the IC Station.

Analog Simulation is again done using post simulation with Accusim to determine the circuit delays.

Hierarchical design using previous design circuits can also be done in Mentor Graphics.