......... EE 562, Fall 2000
Professor A. Mason

 

Solutions For Homework 8
..................

Problem 1:  Problem 3.13 from the textbook.  You know what the answer is, but you must derive the expression using small signal analysis which includes the body effect by applying the test source method.  You may assume that the impedance looking in to the drain of Q2 (Fig. 3.14) is ro2=rds2.

From the schematic, ro2=rds2. The resultant small signal model shown above gives:
-(gm4+gs4)Vs4 + gds4Vx-gds4Vs4-ix=0
i.e. (gm4+gs4+gds4)Vs4 + ix=gds4Vx and  Vs4=ix/gds2
i.e.ix(1+( gm4+gs4+gds4)/gds2)=gds4Vx
Rout=Vx/ix = rds4[1+rds2(gm4+gs4+gds4)]


Problem 2:  Problem 3.31 from the textbook.  The –3dB frequency (in Hertz) is given by f-3dB = (routCL)-1.
Given Ibias=0.1mA and (W/L)=100um/1.6um. CL=100 pF
DC gain= gm1(rds2Iirds4);  
gm1=(2
mnCox(W/L)Ibias/2)1/2 = (2x92x10-6x(100/1.6)(0.1x10-3)/2)1/2
        = 0.758 mA/V
rds2=8000L/ID = 8000x1.6/0.05mA = 256 K
W
rds4= 12000L/ID = 12000x1.6/0.05mA = 384K
W
(rds2 || rds4)=154K
W
DC gain = 0.758 mA/V x (256K || 384K)
= 116.
w-3dB = 1/((rds2 || rds4)CL) = 1/(154x103x100x10-12) = 2p 10kHz.
w-3dB =   2p f-3dB à f-3dB = 10kHz 
(Note, the equation in the problem statement should have read,
w-3dB = (routCL)-1

Problem 3:  Cascode Amplifier

The figure below shows and nMOS telescopic cascode amplifier with a pMOS current mirror load, which mirrors a 100mA reference current.  The transistors have the same parameters used for all previous SPICE problems (repeated below), and the following sizes (W/L in mm): M1: 10/2, M2: 10/2, M3: 5/2, M4: 5/2.  VDD is 6V and there is a capacitive load of 1pF.

a) Calculate the required value of Vbias if Vin = 1.4V and VDS1=1.5V (ignore body effect and channel length modulation).
To determine VGS2 : The current through M2 is 100mA and has (W/L)=10/2 = 5
Thus, ID=
mnCox/2 (W/L)(VGS2-Vtn)2 = 100mA. This gives VGS2=1.49V
VDS of M1, VGS2 and Vbias form a closed loop. Applying KVL,
Vbias=VDS1+VGS2 = 1.5+1.49 = 2.99V


b) Simulate this circuit in SPICE with Vin = 1.4V and Vbias = 3V.  Plot the gain in dB from 10Hz to a frequency slightly greater than the –3dB frequency.  List the DC gain and the –3dB frequency.  Note, you may need to adjust the maximum frequency to get a good plot, but you can use 10Meg as a starting point. 

The DC gain is observed to be 34.7dB and –3dB frequency is ~1 MHz.

c) Experiment with the effect of the DC level on Vin by changing it to 1.3V and 1.5V.  Comment on the effects this has on the circuit and why they occur (no SPICE output here, just discuss your observations).

When Vin changes to 1.3V, M3 will be in triode region and when Vin changes to 1.5 volts, M1 and M2 will be in triode region. This causes rds of each of the transistors in the triode region to decrease resulting in the decreased gain.

d) Based on the discussions in class, what feature(s) of this circuit limits the DC gain of this amplifier.

Gain is limited by the output resistance of the current mirror load.  The resistance looking into the cascode amplifier is ~gmro2, but the resistance of the simple current mirror is only ~ro, so the parallel combination (which is the total output resistance) is only ~ro.  If we would have used a cascode mirror load, the output resistance would have been much higher (~gmro2/2).


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