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EE 562
ANALOG ELECTRONIC CIRCUITS

Andrew Mason

Email: mason@engr.uky.edu Homepage: http://www.engr.uky.edu/~mason

Assistant Professor
Electrical Engineering
University of Kentucky

Office:
Phone:
Fax:

685 Anderson Hall
859-257-1775
859-257-3092

Mail to:

453 Anderson Hall
University of Kentucky
Lexington, KY 40506-0046

Fall 1999

Course Syllabus

Course Topic Outline

Course Notes:

Handout 1 –Introduction of Solid State Physics (pdf file)

Handout 2 –pn Junction Diodes (pdf file)

Handout 3 –MOS Threshold Voltage Equation (pdf file)

Handout 4 –Spice Notes and B2Spice Tutorial (pdf)

Homework and Solutions

Exams

Exam1 (in pdf format)

Exam 2 (in pdf format)

Design Project

Design Project Description

Design Project Description Modifications

Questions and Answers


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EE 562: Analog Electronic Circuits: Fall 1999 Course Syllabus

Class Time:

Tuesday/Thursday 8:00am - 9:15am
Location: 255 Anderson Hall
Instructor:

 

Prof. Andrew Mason

 

685 Anderson Hall
257-7517
mason@engr.uky.edu
Office Hours:

 

         Monday
Tuesday
Thursday
4:00pm -   5:00pm
9:30am - 11:00am
9:30am - 11:00am

Prerequisite:
EE 461, engineering standing, and a desire to learn circuit design.
Students are expected to have a thorough understanding of solid state electronics and some experience with transistor-level circuit design. Familiarity with a SPICE simulation program is also necessary.

Required Text:
Gray and Meyer, Analysis and Design of Analog Integrated Circuits, 3rd Ed., 1993, ISBN 0-471-57495-3, TK7874.G688

Supplementary Text:
Johns and Martin, Analog Integrated Circuit Design, 1997, ISBN 0-471-14448-7, TK7874.J65
Sedra and Smith, Microelectronic Circuits, 3rd Ed., 1991, ISBN 0-03-51648-x, TK7867.S39 1991
Roberts, Sedra, Smith, Spice for Microelectronic Circuits, 3rd Ed., 1992, ISBN 0-03-052617-5, TK7867.S39 1992
Horenstein, Microelectronic Circuits and Devices, 2nd Ed., 1996, ISBN 0-13-701335-3, TK7874.H675
Allen and Holberg, CMOS Analog Circuit Design, 1987, ISBN 0-03-006587-9

Copies of these books are on reserve in the Engineering Library (or should be soon). Please take a look at them if you want more information or are having trouble with a topic. One of these books covers SPICE, but I will hand out additional material on SPICE in class.

Objective
The objective of this course is to provide students with a working knowledge of a variety of analog circuits, their design and use including high-frequency behavior.

The following competencies should be imparted to the students:
1. Ability to construct small signal equivalent circuits that reflect the spectral region of interest.
2. Ability to use SPICE in the design and analysis of analog electronic circuits.
3. Understanding of the role of analog circuits in performing a variety of tasks.

Attendance and Conduct in Class:
Students are expected to attend class and be bright and cheerful with lots of questions. It will be hard to do well in this class without attending the lectures. It is the student's responsibility to get notes and handouts for any missed class. Makeup exams for excused absences will be oral exams given after the normal exam date. Oral exams will not be fun for either one of us, so try not to miss exams. You are free to eat, sleep, or even read the newspaper in class, but the material is your responsibility, and you should always conduct yourself in a manner that will not disturb other people in the class.

Computer Accounts
This semester we will be using the Candence software package for circuit simulation. All students must have a UNIX account to use this software. To see if you have an Engineering (ECS) UNIX account or to create one,
telnet to pop.engr.uky.edu and select option (4) Activate UNIX account.

You must also set up an account in the EWL lab which is located in CRMS. To set up this account go to
http://www.uky.edu/userids and follow the instructions to activate an EWL account.

You will need these accounts by the 3rd week of class, so don't wait too long to get this done. Contact me if you have any trouble setting up your account(s).

Grading
Homework
Several problem sets will be given as homework which will be due on Tuesday, one week after it was assigned. Homework due dates are listed on the Course Outline. Students are encouraged to work together on homework as long as each student tries to complete all of the problems on his own. Everyone must turn in individual homework which will be graded more on effort than on correct answers. Coping will not be tolerated.
Exams
There will be two mid-term exams and a final exam as listed in the course outline. The final exam will be comprehensive but will focus on material covered after the second exam. Exams will likely be open-book, open-notes, although the instructor will inform you specifically before each exam. There will be no discussion or exchange of notes between students during the exam.
Design Project
This class will contain a circuit design and simulation project which will begin about halfway through the class. The design project will be done in groups of two or three, but each student must write an individual report. Report format will be standard for all students and will be explained before the design project is started. Grades for the project will consist of three parts, design approach, results, and report quality.
Final Grade
Grades will be based on homework, two mid-term exams, a final exam, and a written report about the design and simulation project. Overall grades will be normalized and assigned to a standard curve with the following component contributions:

Homework:
Exam 1:
Exam 2:
Final Exam:
Project & Report:
15%
20%
20%
20%
25%

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EE 562: Analog Electronic Circuits: Fall 1999 Course Outline

Week

Date

Topic

Reading

Supplement Reading

Homework Due

1

Aug. 26 Introduction, syllabus HO1    

2

Aug. 31 semiconductor physics, pn junctions 1.1-1.2 J&M Ch. 1  
  Sept. 2 BJT and MOS device physics 1.3-1.7    

3

Sept. 7 MOS device physics 1.9-1.11  

HW1

  Sept. 9 BJT small signal model 1.4    

4

Sept. 14 MOS small signal model 1.8  

HW2

  Sept. 16 fabrication techniques 2.1-2.2, 2.8-2.11 J&M Ch. 2  

5

Sept. 21 device layout and process yield 2.12-2.13, HO  

HW3

  Sept. 23 SPICE modeling, exam review A2.1 + HO    

6

Sept. 28 EXAM 1 (covers Wk. 1-5)    
  Sept. 30 single transistor amplifiers Ch. 3 MOS sections J&M Ch. 3  

7

Oct. 5 active loads and current mirrors Ch. 4, MOS sections J&M Ch. 3

HW4

  Oct. 7 active loads and current mirrors      

8

Oct. 12 (catch up day)    

HW5

  Oct. 14 advanced biasing techniques Ch. 4, appendices    

9

Oct. 19 output stages Ch. 5, MOS sections  

HW6

  Oct. 21 MOS operation amplifier 6.5 + HO J&M Ch. 5  

10

Oct. 26 MOS operation amplifier 6.5 + HO  

HW7

  Oct. 28 discuss project, exam review      

11

Nov. 2 EXAM 2 (covers Wk. 6-10)    
  Nov. 4 advanced opamps HO J&M Ch. 6  

12

Nov. 9 frequency response Ch. 7  

HW8

  Nov. 11 introduction to feedback Ch. 8    

13

Nov. 16 introduction to feedback    

HW9

  Nov. 18 noise analysis 11.1-11.4 J&M Ch. 4  

14

Nov. 23 noise analysis    

HW10

  Nov. 25 HOLIDAY      

15

Nov. 30 CMOS comparators HO J&M Ch. 7  
  Dec. 1 sample-and-hold circuits HO J&M Ch. 8  

16

Dec. 7 reference circuits HO J&M Ch. 8  
  Dec. 9 Last Class      
  Dec. 10 Project Reports Due      
  Dec. 13 Final Exam (comprehensive,) 1:30pm (?)    

HO = handout
J&M = Johns and Martin supplemental text


Professor Mason's: HOME | RESEARCH | AMSaC LAB | EE COURSES
University of Kentucky | UK College of Engineering | UK Electrical Engineering | UK EE Faculty