For the following problems, use the model parameters below for nMOS (from HW8) and pMOS transistors. If the parameter ‘K’ is specified in a problem, you must calculate the necessary W/L value to match according to the KP from the models. Use L = W = 2m m as default MOS transistor sizes. For BJTs, use default parameters unless the problem gives you a value to use, e.g. b _F. For each problem you should turn in a schematic (or netlist if you’re using a non-graphical version of SPICE) and the necessary plots. For all MOS SPICE problems, also turn in a netlist to show you have correctly set the transistor sizes and model parameters. Please don’t turn in more than is necessary, and try to format your homework results so that they can be easily read and understood.

Because this is a long assignment, two of the SPICE problems are for extra credit. You are not required to do these! However, they will help your understanding of transistor circuits, and, if you do them, you will get 10 pts. per problem added to your Homework score, i.e. you can get 110/90 points for doing both extra credit SPICE problems.

(a) Simulate the BJT Common-Emitter Amplifier (Analog Inverter) shown in Text Figure 6.4. Use the default NPN BJT model parameters, VCC = 12V, RB = 20kW , and RC = 1kW . Plot the transfer characteristic (Vout vs. Vin) and comment on your results relative to the plot in Figure 6.6.

(b) What is the effect of increasing the load resistance, RE? Why?

Problem 2 (15 points)

(a) Simulate the MOS Common-Source Amplifier (Analog Inverter) shown in Text Figure 6.11 for K₁ = 5 K₂ and K₁ = 50 K₂ by adjusting W₁ (where Q1 is the input transistor). Let VDD = 6 V and plot the transfer characteristic (Vout vs. Vin), i.e. perform a DC sweep of Vin from 0 to 6 V.

NOTE: The best way to do this is to put both circuits in the same Spice file and connect them to the same input voltage. You can then plot both cases on the same graph.

(b) Comment on the effect of increasing K1 relative to K2. (Hopefully you can determine why this effect happens!)

(c) Over what range of Vout is Q1 in saturation (constant-current)?

Simulate the Common-Collector Amplifier (Voltage Follower) for an NPN BJT with default Spice model parameters (see Text Figure 6.20). Let VCC = 12 V, and RB = RE = 10kW .

(a) Plot the transfer characteristic (Vout vs. Vin) using a DC sweep of Vin from 0 to 12 V.

(b) Change RE to 100W and 1MW , and plot the transfer characteristics for each.

(c) Comment on the performance of this circuit as a voltage follower (i.e. Gain @ 1).

(a) Simulate the MOSFET Common-Gate cascode amplifier (Text Figure 6.32) and plot the transfer characteristic (Vout vs. Vin). Use VDD = 10V, VSS = -10V, and MOSFET parameters above. Set all Length and Width values to 2m m. Beware, the results of this circuit are poor (low gain, and Vout never reaches VSS at large Vin, but we’ll improve that in part b).

(b) Notice that if we ignore the common-gate cascode transistor, this is just a common-source amplifier with an active load, the same as in Problem 2. Use the knowledge you gained in Problem 2 to make this circuit perform better. Adjust the K₁/K₃ ratio (where Q₁ is the load) to make the load transistor ‘more resistive’ by increasing L₁ to 100m m and plotting the new transfer characteristic. Note, this is the same effect as increasing the load resistor value in Problem 1. You many want to put both circuits in the same file to plot the two results together (see not in Problem 2).

Problem 5 (15 points)

(a) Simulate the digital CMOS inverter (Text Figure 6.39) and plot the transfer characteristic (Vout vs. Vin) when |Kp| = Kn and when Kn = 2|Kp|. (Use 2m m as the default value for W and L of both transistors and scale Wn appropriately, rounding to the nearest 0.5m m.) Assume the MOSFET parameters above and VDD = 6 V. Turn in the plot and the circuit netlist.

NOTE: The best way to do this is to put both circuits in the same Spice file and connect them to the same input voltage (like in Problem 2). You need to do a DC sweep of Vin from 0 to 6 V. Note also that KP is a positive quantity in Spice, even for pMOS, so |Kp| = ½ KPp (W/L)p.

(b) What is the crossover voltage, Vic, for both cases? (Remember, Vic is Vin for which Vout = VDD/2 = 3V).

(c) What ratio Wp/Wn and |Kp|/Kn is needed to set Vic to the middle of the input swing, i.e. 3 V? Determine this by adjusting Wp in spice until Vic = 3V. Why is Vic not at 3 V when |Kp| = Kn?